Volume 1 Issue 10, October 2018

The physical fingerprinting of a memristor crossbar array can be used to prove whether a digital key stored in the array is securely destroyed.

Guided self-assembly of block copolymers can generate the patterns required for the fabrication of advanced integrated circuits.

This Review Article examines state-of-the-art metrology methods for integrated circuits and highlights how new integrated circuit device design and industry requirements affect lithography options and consequently metrology requirements.

A hafnium oxide memristor crossbar array integrated with transistors can provide a provable key destruction scheme in which unique physical fingerprints are extracted by comparing the conductance of neighbouring memristors, and can only be revealed if a digital key stored on the same array is erased.

A free-standing top contact design reduces the thermomechanical stress in microthermoelectric coolers, resulting in improved reliability and cooling stability.

A comparison between the use of directed self-assembly and conventional patterning methods in the fabrication of 7 nm node FinFETs shows similar device performance, suggesting directed self-assembly could offer a simplified patterning technique for future semiconductor technology nodes.

The spanning tree protocol is a key component of today’s Ethernet. Radia Perlman, inventor of the underlying algorithm, recounts how it was first developed.